[z88dk-dev] z80asm .reloc for runtime binary relocation
Posted: Wed Nov 02, 2016 2:24 am
After some discussion on this, it turns out the reloc file is inadequate as-is for relocating most binaries.
Right now, it is only a list of binary offsets where a 16-bit adjustment would have to be made if the binary is moved from its original ORG. This is obviously inadequate for instances were the upper or lower 8 bits of an address is used in computations which occurs frequently in (eg) sdcc-generated code.
Here the address "_dos_filenum" is divided into 8-bit parts.
What I think will work is to have the reloc file consist of three parts. The first part is a 16-bit count (number of offsets) followed by a list of 16-bit offsets where a 16-bit quantity needs adjustment by the code movement (this is what is done now for .reloc). The second part is a 16-bit count followed by a list of 16-bit offsets where an 8-bit quantity needs adjustment by the LSB of the code movement. The last part is a 16-bit count followed by a list of 16-bit offsets where an 8-bit quantity needs adjustment by the MSB of the code movement.
Any thoughts on this? Will this finally put to bed the runtime relocation issue and if so how easy would it be to put into z80asm?
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Right now, it is only a list of binary offsets where a 16-bit adjustment would have to be made if the binary is moved from its original ORG. This is obviously inadequate for instances were the upper or lower 8 bits of an address is used in computations which occurs frequently in (eg) sdcc-generated code.
Code: Select all
0109 DD 7E FC [19] 343 ld a,-4 (ix)
010C C6r00 [ 7] 344 add a, #<(_dos_filenum)
010E DD 77 FC [19] 345 ld -4 (ix),a
0111 DD 7E FD [19] 346 ld a,-3 (ix)
0114 CEs00 [ 7] 347 adc a, #>(_dos_filenum)
0116 DD 77 FD [19] 348 ld -3 (ix),a
What I think will work is to have the reloc file consist of three parts. The first part is a 16-bit count (number of offsets) followed by a list of 16-bit offsets where a 16-bit quantity needs adjustment by the code movement (this is what is done now for .reloc). The second part is a 16-bit count followed by a list of 16-bit offsets where an 8-bit quantity needs adjustment by the LSB of the code movement. The last part is a 16-bit count followed by a list of 16-bit offsets where an 8-bit quantity needs adjustment by the MSB of the code movement.
Any thoughts on this? Will this finally put to bed the runtime relocation issue and if so how easy would it be to put into z80asm?
------------------------------------------------------------------------------
Developer Access Program for Intel Xeon Phi Processors
Access to Intel Xeon Phi processor-based developer platforms.
With one year of Intel Parallel Studio XE.
Training and support from Colfax.
Order your platform today. http://sdm.link/xeonphi